Design-Reuse

ChipX Simplifies DDR2 Design With Industry Standard DDR PHY Interface v2.0

March 12, 2008 -- ChipX, Inc., a leading developer of mixed-signal ASICs offering the industry's broadest array of value-added solutions, today announced that it has adopted the industry standard DDR ...
Design-Reuse

DDR PHY Interface Specification to be Unveiled Next Week at MemCon

ARM, Denali, Intel, Rambus, Samsung, and Synopsys team on specification to address development challenges for DDR-DRAM memory systems PALO ALTO, Calif. -- Sept. 6, 2006 -- Denali Software, Inc., today ...
Business Wire

Faraday Delivers DDR/LPDDR Combo PHY IP Solutions on UMC’s 22ULP and 14FFC

HSINCHU, Taiwan--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design and IP provider, today announced the availability of its DDR/LPDDR combo PHY, supporting from 3 rd ...
EDN

Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards in a Single PHY

MOUNTAIN VIEW, Calif., April 7 /PRNewswire-FirstCall/ — Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and ...