EDN

Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 1)

These design guidelines provide the best practices for DDR and DDR2 SDRAM custom memory interface implementation in Stratix III and Stratix IV FPGAs. Figure 1 shows the design flow that is required ...
Electronics Weekly

Intel unveils DDR chipset for Pentium 4

Intel unveils DDR chipset for Pentium 4News from E-InSiteAfter several months of anticipation, Intel has released a chipset that will allow its Pentium 4 processor to use double data rate (DDR) SDRAM ...
Design-Reuse

The Love/Hate Relationship with DDR SDRAM Controllers

Almost everyone knows that the bulk of DRAMs produced end up in desktop and laptop computers just like the one used to write this article. In fact, approximately 90% of all DRAMs produced are used in ...
thg.ru

DDR for Pentium III: 10 Boards with VIA Apollo Pro 266 — THG.RU

More Bandwidth for the Pentium III? The new VIA Apollo Pro 266 is supposed to infuse the somewhat dated Intel Pentium III with renewed vigor. The new chipset offers more memory bandwidth when used in ...
thg.ru

Athlon Boosters — Three AMD 760 Boards for DDR SDRAM — THG.RU

The fast-paced computer world shows the same scenario over and over again: What may be the latest thing today will be old news tomorrow. AMD’s 760 chipset, the first building block of the SocketA ...
TechRepublic

Implementation of DDR SDRAM Controller Using Verilog HDL

Now-a-days, DDR SDRAM (Double Data Rate Synchronous Dynamic Random Access Memory) has become the most popular class of memory used in computers due to its high speed, burst access and pipeline feature ...
EDN

Technical hurdles slow DDR SDRAM’s debut

Interoperability issues are slowing the introduction of double-data-rate (DDR) SDRAM, and will likely confine the new memory interface to use in servers and high-performance desktops through the ...
Eurogamer

AMD Athlon using DDR SDRAM review

We've spoken quite a lot about DDR memory in the last few months, but this is the first opportunity we've had to test the new technology for ourselves. With the falling prices of Athlons and memory, ...
Electronics Weekly

Palmchip intros multi-channel DDR shared memory processor core

Palmchip Corporation has introduced a multi-channel double data rate (DDR) sharedmemory processor megacore that integrates a DDR SDRAM memory controller, up to eight32/64-bit DMA channels with ...
Electronic Design

Eye-Diagram Analysis Speeds DDR SDRAM Validation

Double-data-rate synchronous dynamic random access memory (DDR SDRAM) physical-layer testing is a crucial step in making sure devices comply with the JEDEC specification. The ultimate goal is to ...
ExtremeTech

Micron's 320GB/sec Hybrid Memory Cube comes to market in 2013, threatens to finally kill DDR SDRAM

The Hybrid Memory Cube Consortium, which consists of such silicon luminaries as Micron, Samsung, and IBM (but not Intel), has finally finished hammering out the Hybrid Memory Cube 1.0 standard. The ...
Design-Reuse

Implementing custom DDR and DDR2 SDRAM external memory interfaces in FPGAs (part 1)

This is a two-part article that focuses on the design guidelines and describes how to implement DDR or DDR2 external memory interfaces (EMIFs) using FPGAs via ALTDLL and ALTDQ_DQS megafunctions. This ...