TMCnet

MicroCloud Hologram Inc. Utilizes FPGA to Accelerate Tensor Network Computing to Achieve Quantum Spin Models

MicroCloud Hologram Inc. (NASDAQ: HOLO), ("HOLO" or the "Company"), a technology service provider, proposed an innovative hardware acceleration technology that converts the quantum tensor network ...
Yahoo Finance

MicroCloud Hologram Inc. Develops Serial-Parallel Architecture-Based FPGA Quantum Computing Simulation Framework

SHENZHEN, China, Dec. 22, 2025 (GLOBE NEWSWIRE) -- MicroCloud Hologram Inc. (NASDAQ: HOLO), (“HOLO” or the "Company"), a technology service provider, launched a brand-new FPGA-based quantum computing ...
Electronic Design

Architecture Supports Multiple Domain-Specific FPGA Platforms

Defined as revolutionary, the Application Specific Modular Block (ASMBL) architecture promises rapid, cost-effective deployment of multiple domain-specific FPGA platforms with a blend of features.
Semiconductor Engineering

Manycore-FPGA Architecture Employing Novel Duet Adapters To Integrate eFPGAs in a Scalable, Non-Intrusive, Cache-Coherent Manner (Princeton)

A technical paper titled “Duet: Creating Harmony between Processors and Embedded FPGAs” was written by researchers at Princeton University. “The demise of Moore’s Law has led to the rise of hardware ...
Nature

Hardware Architecture for Cryptographic Algorithms on FPGA

Field Programmable Gate Arrays (FPGAs) have emerged as a versatile platform for implementing cryptographic algorithms, offering a balance between flexibility, performance and energy efficiency. Recent ...
Nasdaq

Microchip Technology Achieves Key Milestones in Radiation-Tolerant PolarFire FPGA Technology

Microchip Technology has announced significant advancements in its Radiation-Tolerant (RT) PolarFire® technology, achieving MIL-STD-883 Class B and QML Class Q qualifications for the RT PolarFire ...
Semiconductor Engineering

Double Duty Logic Block Architecture Enabling Concurrent LUT and Adder Chain Usage (Nanyang Technological Univ. et al)

A new technical paper titled “Double Duty: FPGA Architecture to Enable Concurrent LUT and Adder Chain Usage” was published by researchers at Nanyang Technological University, Cornell University, ...
Design News

Is Platypus from Zero ASIC the FPGA equivalent to RISC-V?

Before I tell you what I’m about to tell you, let’s first refresh our minds as to RISC-V processors. Why? Well, because even though what I’m about to tell you has nothing to do with RISC-V per se, in ...
Electronic Design

Microchip Presents PolarFire SoC FPGA Icicle Kit as First With RISC-V Architecture

Microchip Technology unveiled the RISC-V based System on Chip (SoC) Field-Programmable Gate Array (FPGA) development kit for PolarFire SoC FPGA, a low-power, low-cost, RISC-V-based SoC FPGA. Microchip ...