The number of systems-on-a-chip (SoCs) that require an interface to off-chip memory is increasing. As a result, more and more designers are turning to double-data-rate (DDR) SDRAM interfaces such as ...

Exponential increases in data and demand for improved performance to process that data has spawned a variety of new approaches to processor design and packaging, but it also is driving big changes on ...

The PCI Express DMA reference design using external memory highlights the performance of the Intel Arria V, Arria 10, Cyclone V and Stratix V Hard IP for PCI Express using the Avalon Memory-Mapped ...

In 2017, the credit bureau Equifax announced that hackers had breached its system, unleashing the personal information of 147-million people. As a result, the company has settled a class action suit ...

SmartDV Technologies, the leader in design and verification intellectual property (IP), today unveiled its broad portfolio of memory design and verification solutions, including memory models, ...

Through the Samsung Advanced Foundry Ecosystem (SAFE TM) IP Alliance, Rambus works closely with Samsung Foundry to optimize its memory controller IP for advanced Samsung process technologies, enabling ...

JEDEC is still finalizing the HBM4 memory specifications, with Rambus teasing its next-gen HBM4 memory controller that will be prepared for next-gen AI and data center markets, continuing to expand ...

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence (Nasdaq: CDNS) today announced the tapeout of the industry’s first LPDDR6/5X memory IP system solution optimized to operate at 14.4Gbps, up to 50% faster ...

Memory device controller supplier Phison Electronics and industrial memory module specialist Innodisk have both enjoyed an influx of short lead-time orders for healthcare applications... Judging from ...