The purpose of a phase locked loop (PLL) is to generate a frequency and phase-locked output oscillation signal. To achieve this goal, prior art essentially functioned ...

But taking a voltage-controlled oscillator at 100 MHz (nominal) and dividing its output by 100 will give you a signal you can lock to a 1 MHz crystal oscillator which is, of course, trivial to build.

This application note discusses phase frequency detector characteristics that affect phase-locked loop (PLL) dead band and jitter performance. In PLLs that employ charge pump loop filter designs the ...