Forbes

The RISC-V Architecture Secures Smartwatches With Google And Qualcomm

Today, Google and Qualcomm announced an extension of their partnership to bring RISC-V-based systems-on-chips (SoCs) to market with support for Wear OS, a version of Android for smartwatches and ...
Seeking Alpha

SEALSQ Adopts RISC-V the Open-Standard RISC-V Architecture; Achievement Aligns with Rising Global Demand for Edge-AI and Machine Learning Applications

Geneva, Switzerland, Sept. 13, 2024 (GLOBE NEWSWIRE) -- For more information visit: https://riscv.org/news/2024/07/sealsq-risc-v-semiconductors-is-pioneering ...
Seeking Alpha

SensiML Expands Platform Support to Include the RISC-V Architecture

PORTLAND, Ore., Oct. 10, 2024 /PRNewswire/ -- SensiML™ Corporation, a leader in AI software for IoT and a subsidiary of QuickLogic (QUIK), today announced the integration of RISC-V® processor support ...

China’s SpacemiT to launch server-class RISC-V processor after raising US$86 million

CEO Chen is betting on Edge AI - which can run AI algorithms locally rather than in the cloud - to boost the adoption of RISC ...
TechSpot

DeepComputing announces new tablet based on the RISC-V architecture

In context: After introducing the world's first RISC-V laptop, DeepComputing is now launching what is expected to be the first fully-fledged mobile platform based on the open ISA. The company is ...
redsharknews.com

The key CPU architecture you've never heard of: RISC-V

The RISC-V CPU architecture currently accounts for under 1% of the world’s processor market, but that is going to change rapidly over the next years as its parallel processing is perfectly suited to ...
Semiconductor Engineering

Exploring The Security Framework Of RISC-V Architecture In Modern SoCs

In the rapidly evolving world of technology, system-on-chip (SoC) designs have become a cornerstone for various applications, from automotive and mobile devices to data centers. These complex systems ...
ExtremeTech

RISC rides again: New RISC-V architecture hopes to battle ARM and x86 by being totally open source

A new instruction set by the original creator of MIPS aims to reinvent the ultra-low power, high-efficiency processor -- and to do so with an architecture that's fundamentally open and available to ...
Semiconductor Engineering

A RISC-V Capability Architecture Orchestrating Compiler, Architecture, And System Designs For Full Memory Safety (Georgia Tech, Arm Research)

A technical paper titled “RV-CURE: A RISC-V Capability Architecture for Full Memory Safety” was published by researchers at Georgia Institute of Technology and Arm Research. “Despite decades of ...
Electronic Design

Examining the RISC-V Architecture

RISC-V is an open-source instruction set definition managed by RISC-V International. This TechXchange includes content that delves into the architecture and design of a RISC-V processor core. How did ...
Ars Technica

Google wants RISC-V to be a “tier-1” Android architecture

Over the holiday break, the footage from the recent “RISC-V Summit” was posted for the world to see, and would you believe that Google showed up to profess its love for the up-and-coming CPU ...
TechSpot

Google just removed RISC-V support from the Android kernel

Facepalm: The open-source RISC-V instruction set architecture, evolved from other reduced instruction set computer (RISC) architectures, is winning international support and collaboration. However, ...