EDN

ADC Basics, Part 2: SAR & Delta-Sigma ADC Signal Path

Generally, you will find the SAR (successive-approximation-register) and delta-sigma (??) analog-to-digital converters (ADCs) in lower frequency applications. The signal chain for these applications ...
生物通

一个17-fJ/conv-step的FoMw和一个259平方微米的7位C-CIDAC SAR ADC

电容模数转换器与电荷注入模数转换器融合的SAR ADC结构优化，采用紧凑电荷注入单元和脉冲门控数字控制，在28nm CMOS工艺下实现0.000259 mm2面积和0.835 mW功耗，支持700 MHz采样频率，达到38.7 dB SNDR和17.03 fJ/conv-step能效，显著优于传统时间 interleaving ADC设计。 摘要 ...
EDN

ADC Basics, Part 3: Using Successive-Approximation Register ADC in Designs

Successive-approximation register analog-to-digital converters (SAR-ADC) are frequently the architecture of choice for medium-resolution applications. SAR products on the market can operate at maximum ...
生物通

一种13位ENOB全异步噪声整形SAR ADC，具备粗细比较、失配误差整形和 ...

1. 这篇论文提出了一种2阶噪声整形（NS）SAR ADC设计，结合失配误差整形（MES）和数字预测（DP）方法补偿输入范围损失，采用粗细比较（CFC）方案降低功耗，并通过异步逻辑设计省去外部高速时钟，在130nm CMOS工艺下实现81.54dB SNDR和13.25bit ENOB性能。 摘要： 高 ...