Close collaboration on technology enablement unlocks optimal PPA potential of GLOBALFOUNDRIES® 12LP and 12LP+ (12nm FinFET) platforms and 22FDX® (22nm FD-SOI) platforms Targeted innovations in Fusion ...

Synopsys' Fusion Compiler RTL-to-GDSII solution's unique, single data model-based infrastructure coupled with a single-shell, hyper-converged optimization architecture unlocks optimal PPA potential ...

Synopsys has announced that its AI-driven digital design and analog design flows have achieved certification on Samsung Foundry's SF2 process with multiple test chip tape-outs. The reference flows, ...

SANTA ROSA, Calif--(BUSINESS WIRE)--Keysight Technologies, Inc. (NYSE: KEYS), a leading technology company that delivers advanced design and validation solutions to help accelerate innovation to ...

Collaboration on AI-Driven Design Flows for Optimization and Productivity, Advancements in Photonic IC Integration, Plus Broad IP Development on TSMC 2nm Technology "The advancements in Synopsys' ...

Successful customer tape out of HBM3 design on SF2 process and I-CubeS technology leveraged Synopsys 3DIC Compiler to reduce turnaround time by 10X New Synopsys certified AI-driven digital and analog ...

Certified digital and analog flows on the TSMC N2P and A16™ processes using TSMC NanoFlex™ architecture boost performance and speed analog design migration 3DIC Compiler platform and 3D-enabled IP ...

BALTIMORE–At the International Test Conference here today, Synopsys Inc. announced new advanced test modeling technology that will more than triple the capacity of the company's design-for-test ...

Mountain View, Calif.-based Synopsys Inc. today said NEC Electronics Inc. has successfully used its physical compiler to tape out two low-power, 1.8-million gate, 100MHz network switch fabric ICs at 0 ...

Mountain View, CA. Synopsys Inc. at ITC announced a new, breakthrough ATPG and diagnostics technology that delivers 10X faster run time and 25% fewer test patterns to shorten schedules, accelerate ...