My colleagues from Mentor Graphics, Ron Press, Martin Keim, and I often write about various aspects of digital IC test. If you started following the Test Voices blog when it was part of Test & ...

For over 15 years, I've been a big proponent of hierarchical test. Hierarchical test is the commonly used term for creating DFT (design-for-test) features and test patterns at lower level circuit ...

Two test strategies are used to test virtually all IC logic: automatic test pattern generation (ATPG) with test pattern compression and logic built-in self-test (BIST). This article will describe how ...

The fundamental challenges of IC test have been the same for a long time. At the heart of all test strategies is controllability and observability. First, control the state of the chip with known test ...