Chip testing used to be straightforward. The development team used fault simulation to select a subset of the functional tests that could detect most possible manufacturing faults. These were ...

Back when semiconductor devices contained only a few thousand gates, manufacturing test was almost an afterthought. The development team threw the chip “over the wall” to the test engineers, who ...

Handling timing exception paths in ATPG tools while creating at-speed patterns has always been a tough and tricky task. It is well understood that at-speed testing is a requirement for modern ...

As a result, designers are on the move toward adopting an at-speed test methodology. When multiple clock speeds are used in separate segments of the design, at-speed tests for one clock segment across ...