Elstree, UK, 03 December 2001 -- New PCI host bridge and memory controller interface intellectual property (IP) cores are now available for the ARCtangent[tm]-A4 processor, a leading user-customizable ...

A Gigabit Ethernet controller incorporating a PCI Express interface takes advantage of the high-throughput, low latency capabilities of PCI Express to deliver true gigabit performance. These enhanced ...

DDR3 memory systems can provide a significant performance boost to a variety of data processing applications. However, compared to previous generations (DDR and DDR2), DDR3 memory devices have some ...

The PCI Express DMA reference design using external memory highlights the performance of the Intel Arria V, Arria 10, Cyclone V and Stratix V Hard IP for PCI Express using the Avalon Memory-Mapped ...

Acal Semiconductors announces has a PCI controller which can be configured as a bus target, enabling data transfer at modest rates. For demanding applications, the S5335 can become the bus master, ...

What is CXL-attached memory? What is memory pooling? How Leo Smart Memory Controllers work with processors. There’s never enough memory. Applications like cloud computing need as much as they can get.

People have been talking about CXL memory expansion for so long that it seems that it should be here already, but with the dearth of CPUs that can support PCI-Express 5.0 peripherals we have to be ...

In November last year, we gave you a first look at LSI's forthcoming SandForce SF3700 PCI Express SSD Flash controller. It's an impressive silicon integration of both a native PCI Express x4 interface ...