Rated at 30 MIPS at a frequency of 40 MHz, the Field Programmable System Level Integration Circuit (FPSLIC) combines an 8-bit microcontroller with over 50 kgates of FPGA or PLD programmable logic.

Fifteen years ago verification of FPGA designs was easy but as the size of FPGAs has increased so have the verification challenges, Jerry Kaczynski explains. Today it is not unusual for FPGA users to ...